Understanding PCIe Link Training

1. Introduction PCIe link training is the process by which a Root Complex (RC) and an Endpoint (EP) autonomously negotiate and establish a reliable high-speed serial link. No software is involved; everything is done by the Physical Layer state machine. The process must solve: Receiver detection: Does anything exist on the other end? Bit lock: Can the receiver lock its clock-data recovery (CDR) circuit to the incoming bit stream? Symbol/block lock: Can the receiver identify symbol or block bounda